The present invention relates to memory devices and, more particularly, to magneto-resistive memory devices and methods of fabricating the same.
A resistive memory cell is a nonvolatile memory cell containing a resistive memory element that can reversibly switch between two different resistance states responsive to applied voltage. Colossal magneto-resistive material (CMR) is widely used as a resistive memory element. A resistive memory cell using a CMR element is disclosed in U.S. Pat. No. 6,849,891. The resistive memory cell disclosed in the U.S. Pat. No. 6,849,891 is illustrated in FIG. 1.
Referring to FIG. 1, a conventional magneto-resistive memory cell 18 includes a CMR layer 24, a bottom electrode 20, 22 contacting to a bottom of the CMR layer 24, and a top electrode 26, 28 contacting a top of the CMR layer 24. The bottom electrode and the top electrode may have the same structure and are formed of an oxidation resistance layer 20, 28 and a refractory metal layer 22, 26. The magneto-resistive memory cell 18 is formed by depositing layers 20, 22, 24, 26 and 28 and patterning the deposited layers 20, 22, 24, 26 and 28 using photolithography.
A desirable characteristic for such a cell is a switching operation characteristic that allows clear discrimination between two reversible switching states. The resistive memory cell can provide a reliable memory function when it has two resistance states that may be clearly discriminated from a reference value. If the two resistance states are ambiguous, the resistive memory cell may not function well as a memory cell.
In addition, it is desirable for the resistive memory cell to maintain good switching characteristics after repeated memory operations, i.e., it is desirable that the resistive memory cell maintain a certain value of a low resistance state and a certain value of a high resistance state even after repeated operation. This is related to an endurance of the memory cell.
The structure of the conventional magneto-resistive memory cell 18 shown in FIG. 1 may not provide a good switching operation characteristic. Because the bottom electrode 22, the CMR layer 24 and the top electrode 26 are simultaneously formed, an overlapping area between the CMR layer 24 and the bottom electrode 22 is the same as the area of the CMR layer 24. Accordingly, when a voltage is applied to the two electrodes 22 and 26, the entire CMR layer 24 becomes a switching region in which resistance variation occurs. Because the entire CMR layer 24 serves as the switching region, the position/size/number of filamentary current paths that are switched on and off may not be constant, such that resistance states may not be constant. Consequently, the low resistance state and the high resistance state may be ambiguous.
In addition, it is known that heat resistant metal, which may be used for the bottom electrode 22, may be difficult to etch. For this reason, a side profile of the bottom electrode 22 may be inclined rather than vertical. Accordingly, it may be necessary to increase distance between neighboring resistive memory cells to prevent neighboring cells from electrically shorting. However, this increased distance between neighboring memory cells may serve as an obstacle to the implementation of a highly integrated memory device.